IBM claims world's first sub-1 nanometer chip technology
TLDR ● Covered by 2 sources
IBM announced a new chip architecture called nanostack that can fit nearly 100 billion transistors on a fingernail-sized chip, roughly double the density of its previous generation. The company projects the 0.7-nanometer node design could deliver 50 percent higher computing performance or 70 percent greater energy efficiency compared to its 2-nanometer chips, with particular benefits for AI data center SRAM scaling. Commercial production of chips using this technology could begin within five to ten years as foundries adopt the nanostack architecture to replace current nanosheet designs.
Why it matters
IBM claims to have created sub-1-nanometer chip technology with its nanostack architecture that stacks transitions in a staggered layout to pack more transistors in the same space at the 0.7-nanometer node.
